SWP Reader – The Analog Part

I think it’s time to lift the curtain how the analog part of my SWP reader project looks like. This is the exact same circuit that I’ve used in the last two prototypes. I’m going to describe the circuit block by block and show the whole thing at the very end.


There are a bunch of signals and voltages that connect to the circuit. Those are:

5V main supply voltage, taken from USB
V+ 9.5V, higher voltage to supply the opamps
V- -4.5V, negative supply for opamp and comparator
SWP_TX SWP transmit signal, 3.3V
SWP_RX SWP receive signal, 3.3V
SIM_SWP connects to the C6 pin of the SIM-card
DAC supplys a reference voltage between 0 and 3.3V

Transceiver Front-End

This is the heart of the SWP transceiver. It takes the digital TX signal, sends it to the SIM-card while extracting the SWP RX signal by measuring the current drawn by the SIM. The architecture is built around the trans impedance amplifier circuit with some tweaks.

R1/R2 form a voltage divider that convert the incoming 3.3V signal to 1.8V. R2 is also doing double duty as a pull-down. The level-shifted signal directly feeds into the non-inverting input of U1.

The SIM-card SWP pin is directly connected to the inverted opamp input. Yes, I’m using the opamp input as an output here. Since negative feedback is present via R3, the voltage at the two inputs will always be very close to each other, so the SIM will always see the SWP_TX signal.

R3 and the opamp itself is where the magic takes place. Any current that is flowing into the SIM card will cause a voltage drop across R3, and we see this voltage drop at the output of the opamp along with the input signal added to it.

With a maximum SWP signaling current of 1mA we’ll see 1.8V for RX plus 1.8V for the TX signal. Here is a simulation screen-shot with a pulse-train of one-bits on the TX and alternating ones and zeros on the RX:

real-outThe spikes on the edges is caused by the parasitic capacitance of the SIM card and it’s socket. When switching, the charge stored in this capacitance causes a very short burst of current flow. This manifests itself as the spikes on the signal transitions. The ringing is not present at the SIM card terminal though.

If you want to substitute for another opamp make sure that the gain-bandwidth product and the slew rate is sufficient. You need a fast part. I would not go below 100Mhz GBW and 100V/µS slew-rate. The LT1227 does a really good job here.

RX Signal Extractor

This part is straight forward. The mixed RX/TX signal gets converted back to a digital signal with the help of a comparator.


At first the R4/R5 voltage divider brings the mixed RX/TX signal voltage down into the safe range. This is necessary because the power-hungry LT1016 gets powered from the 5V rail instead of the (rather weak) V+. The reference signal from the DAC gets a bit of noise-filtering via R10/C5. Finally R7 provides a good deal of hysteresis for a clean output signal.

The conversion of the comparator output down to 3.3V level is a bit dirty but worked fine so far. I just load the output of the comparator using R8. This reduces the output voltage to the required level and also provides some termination. If you want to be on the safe side you’d rather put a zeener diode clamp in here. R9 and C4 limit the slew-rate to something sane and reduce EMI.

Power Supply

Not much to see here. The power-supply is built around a LT1054 buck-boost converter. That’s pretty much the same chip as the ICL7660, MAX1044 and others. I used low ESR ceramic chip capacitors exclusively.

There is some ripple left on the generated voltages, but that is not causing any issues. The digital outputs look clean and communication over SWP works perfect.


The SD103BW are very cool Schottky diodes by the way. Good spec and *cheap*. They also survive 1.5A peak current. Robust little buggers.


That’s all the analog stuff you need to talk SWP with a SIM-card. How you generate the SWP signals is up to you. I use a Xilinx CPLD for this which talks SPI to a micro-controller and drives/samples the SWP signals from this analog circuit. I’ll likely write about this another day.

If you want to build something upon this circuit don’t forget that you also need to control the power and reset line of the SIM.

The circuit – as is – has no issues reaching the full 1.69 Mbit/s data-rate of the SWP bus. You can even run it at a higher speed without degrading the signal much. The SIM-card that I’m testing with stops to respond after about 2 Mbit/s (way out of spec) but the signals itself still look fine.

For completes sake, here is the entire schematic in one image with the required decoupling capacitors added:


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15 Responses to SWP Reader – The Analog Part

  1. Doj says:

    The SWP pin is directly connected to the *inverted* opamp input.

    …down into the *safe* range.

    I would *not* go below…

    *Not* much to see here.

  2. Nils says:

    Hi Doj, thanks for spellchecking. I’ve fixed the typos 🙂

  3. Tim Riemann says:

    Hi Nils,
    thanks for the great explanation of your circuit.
    In the text you wrote:
    “If you want to build something upon this circuit don’t forget that you also need to control the power and reset line of the SIM.”

    Do you really need to control the RST line of the UICC? According to the ETSI TS 102 613 chapter 5.4, the C2 shall only affect TS 102 221 interfaces. Therefore it shouldn’t be necessary to control the RST line if you are only using the SWP interface.

    CU Tim

  4. Nils says:

    Hi Tim,

    good point. I’m testing with one of these blank Verizon SIM cards and at least these have issues starting up if you don’t do a proper reset sequence. On the other hand back when I wrote the startup code I was still powering the card from a slightly weak power supply (capped at 15mA).

    I do remember that it was working fine on my earliest FPGA prototype, so it’s likely a power thing.

    I have since then modified the power circuit and now I have 50mA set aside for the sim. Next time I touch the startup code I’ll check if the issue still remains.

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  6. Dmitriy Kiselev says:

    Hi Nils,

    What is the value for the DAC you use? The typical one? The problem is that when I work out your sheme I receive only 1’s never 0’s.

    And it happens no matter which value for the DAC I set.


  7. Nils says:

    Hi Dmitry,

    I use 0.7V. That’s for powering the SIM with 3.3V and apply the tx signal with 3.3V as well. Yes, this is slightly out of spec.

    One reason why you’re not seeing anything is because you don’t apply the correct start sequence.

    As far as I remember:

    set VCC and RST pins to low.
    wait a little.
    Set VCC to 3.3V
    wait 30 ms
    Set RST to 3.3V
    wait 10 ms
    apply a constant 3.3V to SWP_TX
    SIM should start to pull current from C6. If it does so it’s a SWP SIM. You should see a 1 at the comparator output
    start clocking out 0 bits via SWP (25% duty cycle, 1.6Mhz). The ACT frame should then be sent by the SIM and you get the bit-stream on the comparator output

    Or your SIM may not have SWP support 🙂 Can you put it into a smart-card reader and give me the ATR? Then I can have a look.

  8. Dmitriy Kiselev says:

    ATR says the card does support NFC:

    3B 9F 97 80 3F 42 A2 80 31 E0 73 F6 21 13 57 4A 43 4F 50 54 65 6C AD


  9. Dmitriy Kiselev says:

    Does it need to do a PPS sending? Or it should work right after ATR?


  10. Dmitriy Kiselev says:

    Write to me an e-mail kiselevd2002@yahoo.com.


  11. Nils says:

    Sent you an email.

    The ATR looks fine.

    The PPS is a ISO7816 (aka smart-card) thing. You don’t need it at all for SWP communication. In fact you can talk to the SIM using only SWP. No need to do anything on the Clock and IO lines.

    If you’ve activated the SWP interface correctly you should get an ACT_SYNC frame from the SIM. See ETSI TS 102 694-2 Chapter “Interface Activation”

  12. Dmitriy Kiselev says:

    Hi Nils,

    Watch your spam folder. Probably you got a letter from me spammed.


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